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Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Paisan Boonchiam | |
dc.date.accessioned | 2014-02-26T05:59:59Z | |
dc.date.accessioned | 2020-09-24T04:35:33Z | - |
dc.date.available | 2014-02-26T05:59:59Z | |
dc.date.available | 2020-09-24T04:35:33Z | - |
dc.date.issued | 2007 | |
dc.identifier.issn | 1685-5280 | |
dc.identifier.uri | http://www.repository.rmutt.ac.th/dspace/handle/123456789/1442 | - |
dc.description | Journal of Engineering, RMUTT Volume 5 Issue 10, July - December 2007 | en_US |
dc.description.abstract | Multilevel Topologies are studied in this paper. These static converter can generate three or more levels in each output phase, and are generally applied to high-power applications because of their ability to operate with larger voltages than the classical two-level converter. The analysis is mainly focused on the three level topology, although there are also some contributions for converters with a larger number of levels. The main objectives are to show the prototype and modeling of multilevel converter. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Rajamangala University of Technology Thanyaburi. Faculty of Engineering | en_US |
dc.subject | Multilevel Converter | en_US |
dc.subject | Modeling and Control | en_US |
dc.title | Multilevel Topologies-Prototype: Description and Modeling | en_US |
dc.type | Article | en_US |
Appears in Collections: | บทความ (Article - EN) |
Files in This Item:
File | Description | Size | Format | |
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Y.05 Vol.10 p.93-102 2550.pdf | Multilevel Topologies-Prototype: Description and Modeling | 1.9 MB | Adobe PDF | View/Open |
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