Please use this identifier to cite or link to this item:
http://www.repository.rmutt.ac.th/xmlui/handle/123456789/1677
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | C. Noisuwan | |
dc.contributor.author | V. Pirajnanchai | |
dc.contributor.author | J. Nakasuwan | |
dc.date.accessioned | 2014-05-27T05:07:04Z | |
dc.date.accessioned | 2020-09-24T04:33:29Z | - |
dc.date.available | 2014-05-27T05:07:04Z | |
dc.date.available | 2020-09-24T04:33:29Z | - |
dc.date.issued | 2003 | |
dc.identifier.issn | 1685-5280 | |
dc.identifier.uri | http://www.repository.rmutt.ac.th/dspace/handle/123456789/1677 | - |
dc.description | Journal of Engineering, RMUTT; Volume 2 Issue 4, July - December 2003 p.98-102. | en_US |
dc.description.abstract | A simple method to model and simulate a Hiperlan/2 receiver front-end is presented. The heterodyne radio architecture is chosen to study due to its simplicity. For reference, the filter, the amplifier, and the mixer used in this linear system simulation have their paramenters set to values that are commercially available. Simulations employed a commercial CAD are used to investigate the receiver performance by injecting one-tone RF carrier of 5.2 GHz. Required standard HIPERLAN/2 of maximum sensitivities at -68 dBm and minimum at-20 dBm are injected into the designed system. A harmonic balance analysis is used to perform both frequency and time domains of the receiver. Verification in the frequency and time domains shows that the system is capable of designed in the power link budget under linear simulation environment. This means that a more complex circuit-level may by further implemented when standard test signals are added. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Rajamangala University of Technology Thanyaburi. Faculty of Engineering | en_US |
dc.subject | WLAN | en_US |
dc.subject | HIPERLAND/2 | en_US |
dc.subject | radio receiver | en_US |
dc.title | System Design and Siimulation of a HIPERLAN/2 Receiver Frout-End | en_US |
dc.type | Article | en_US |
Appears in Collections: | บทความ (Article - EN) |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Volume 2 Issue 4, July - December 2003 p.98-102.pdf | System Design and Siimulation of a HIPERLAN/2 Receiver Frout-End | 3.19 MB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.